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AN813
Vishay Siliconix
R q JA
R q JA
P D + 150 C o * 25 C
P D + 150 C o * 60 C
P D + 500 mW
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(the Package Performance)
Thermal performance for the 3-pin SC-70 measured as
junction-to-foot thermal resistance is 285 _ C/W typical,
340 _ C/W maximum. Junction-to-foot thermal resistance for
the 6-pin SC70-6 is 105 _ C/W typical, 130 _ C/W maximum —
a nearly two-thirds reduction compared with the 3-pin device.
The “foot” is the drain lead of the device as it connects with the
body. This improved performance is obtained by the increase
in drain leads from one to four on the 6-pin SC-70. Note that
these numbers are somewhat higher than other LITTLE FOOT
devices due to the limited thermal performance of the Alloy 42
lead-frame compared with a standard copper lead-frame.
Junction-to-Ambient Thermal Resistance
(dependent on PCB size)
The typical R θ JA for the single 3-pin SC-70 is 360 _ C/W steady
state, compared with 180 _ C/W for the 6-pin SC-70. Maximum
ratings are 430 _ C/W for the 3-pin device versus 220 _ C/W for
the 6-pin device. All figures are based on the 1-inch square
FR4 test board.The following table shows how the thermal
resistance impacts power dissipation for the two different
pin-outs at two different ambient temperatures.
SC-70 (6-PIN)
Room Ambient 25 _ C Elevated Ambient 60 _ C
T J(max) * T A T J(max) * T A
P D + P D +
o o o o
180 C W 180 C W
P D + 694 mW
NOTE: Although they are intended for low-power applications,
devices in the 6-pin SC-70 will handle power dissipation in
excess of 0.5 W.
Testing
To aid comparison further, Figures 3 and 4 illustrate
single-channel SC-70 thermal performance on two different
board sizes and two different pad patterns. The results display
the thermal performance out to steady state and produce a
graphic account of the thermal performance variation between
the two packages. The measured steady state values of R θ JA
for the single 3-pin and 6-pin SC-70 are as follows:
LITTLE FOOT SC-70
3-Pin
6-Pin
SC-70 (3-PIN)
1) Minimum recommended pad pattern
(see Figure 4) on the EVB.
410.31 _ C/W
329.7 _ C/W
Room Ambient 25 _ C
Elevated Ambient 60 _ C
2) Industry standard 1” square PCB with
maximum copper both sides.
360 _ C/W
211.8 _ C/W
R q JA
P D + 150 C o * 25 C
R q JA
P D + 150 C o * 60 C
T J(max) * T A
P D +
o o
360 C W
P D + 347 mW
T J(max) * T A
P D +
o o
360 C W
P D + 250 mW
The results show that designers can reduce thermal
resistance R θ JA on the order of 20% simply by using the 6-pin
device rather than the 3-pin device. In this example, a 80 _ C/W
reduction was achieved without an increase in board area. If
increasing board size is an option, a further 118 _ C/W reduction
could be obtained by utilizing a 1-inch square PCB area.
400
320
240
3-pin
6-pin
400
320
240
3-pin
6-pin
160
80
0
0.5 in x 0.6 in EVB
160
80
0
1” Square FR4 PCB
10 -5 10 -4
10 -3
10 -2
10 -1
1
10
100
1000
10 -5 10 -4
10 -3
10 -2
10 -1
1
10
100
1000
Time (Secs)
Time (Secs)
FIGURE 3.
www.vishay.com
2
Comparison of SC70-3 and SC70-6 on EVB
FIGURE 4.
Comparison of SC70-3 and SC70-6 on 1”
Square FR4 PCB
Document Number: 71236
12-Dec-03
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